1. Technical Field
The present invention relates to a power saving technique for an information processor, particularly to signal bus and multilevel input/output interface technology suitable for use in an information processor intended to achieve power savings by changing a circuit supply voltage.
2. Related Art
Power supply voltages (supply voltages) that power sources supply to digital ICs to operate them are usually fixed to 5 volts or 3.3 volts. However, in order to achieve power savings in information processors such as computer systems, the supply voltages are continuously changed from 5 volts to 3.3 volts and/or the operating clock frequencies in the systems are continuously changed from high to low, depending on the size of the loads application programs put on CPUs. For example, JP-A-8-044465 suggests a method for continuously changing an operational clock frequency in a micro processor in accordance with the load on the micro processor and supplying a power supply voltage corresponding to the operational clock frequency to the micro processor, thereby achieving a balance between appropriate operation speed and a reduction in power consumption.